1. Field of the Invention
The present invention relates to a semiconductor device having a repeater performing buffering operation at some midpoint in a multiplex bus in which an address and data are transmitted by a time division method.
2. Description of the Related Art
FIG. 1 is a circuit diagram showing a part of an example of a conventional semiconductor device. In FIG. 1, 1 indicates a CPU which outputs addresses and data by the time division method, 2 indicates a multiplex bus which transmits the address and data which are output from the CPU 1 by the time division method, 3 indicates a repeater which includes only a buffer circuit which is provided at some midpoint in the multiplex bus 2, 4-1 indicates a data transmission destination among a plurality of data transmission destinations which are connected to a part 2-1 of the multiplex bus 2 which is placed ahead of the repeater 3, 4-2 indicates a data transmission destination among a plurality of data transmission destinations which are connected to a part 2-2 of the multiplex bus 4-2 which is placed before the repeater 3.
FIGS. 2A and 2B show circuit diagrams for explaining the operation of the conventional semiconductor device shown in FIG. 1. When an address ADDRESS 1 which indicates the data transmission destination 4-1 and data DATA 1 to be transmitted to the data transmission destination 4-1 are sent from the CPU 1 by the time division method, the address ADDRESS 1 and the data DATA 1 are sent to the data transmission destination 4-1 through the multiplex bus part 2-2, the repeater 3 and the multiplex bus part 2-1 shown in FIG. 2A.
When an address ADDRESS 2 which indicates the data transmission destination 4-2 and data DATA 2 to be transmitted to the data transmission destination 4-2 are sent from the CPU 1 by the time-division method, the address ADDRESS 2 and the data DATA 2 are sent to the data transmission destination 4-2 through the multiplex bus part 2-2. Then, in this case, since the repeater 3 is configured only by the buffer circuit, the address ADDRESS 2 and the data DATA 2 are also sent to the multiplex bus part 2-1 as shown in FIG. 2B.
As mentioned above, according to the conventional semiconductor device shown in FIG. 1, even when the address indicating the data transmission destination which is connected to the multiplexed bus part 2-2 which is before the repeater 3 and the data are output from the CPU 1, the repeater 3 transmits the address and the data to the multiplex bus part 2-1 by the time division method. Thus, there is a problem in that the repeater performs unnecessary operation that it changes logic values on the part 2-1 from an address value to a data value. Therefore, power is consumed uselessly.
It is an object of the present invention to provide a semiconductor device which can decrease power consumed when an address does not indicate a data transmission destination which is placed ahead of the repeater.
The above object is achieved by a semiconductor device having a repeater performing buffering operation at some midpoint in a multiplex bus over which an address and data are transmitted by a time division method, the repeater including:
a part which transmits only an address when the address does not indicate a data transmission destination which is located ahead of the repeater.
According to the present invention, when the address does not indicate the data transmission destination which is placed ahead of the repeater, the repeater transmits only the address. Thus, the operation in which the logic values on the multiplex bus which is located ahead of the repeater are changed from an address value to a data value is not performed. Thus, power conventionally consumed can be decreased in the present invention.